1. Field of the Invention
The invention relates to the field of microprocessor design. More particularly, the invention relates to power modeling methodologies for a microprocessor.
2. Background Art
With the increased clock frequencies of modern high-performance microprocessors, power usage has increased as well. Consequently, limiting power dissipation has become one of the most stringent design targets. Thus, it is very important to obtain a model providing information to help engineers understand power behavior in a microprocessor. Typically, power behavior is observed by feeding input information into a simulator and then analyzing the results.
FIG. 1 shows a prior art full-chip power modeling simulation in a microprocessor. CPU activity data is generated each cycle (20) and combined with power values per unit of the activity data (22) using power model equations (24). Three values are provided for each unit of activity data (22) corresponding to minimum (MIN), typical (TYP), and maximum (MAX) circuit power conditions. The CPU activity data changes every cycle. CPU activity data (22) may include (1) the number of instructions retired in a current cycle, (2) the number of 1's in a cache line being filled from memory, and/or (3) the number of instructions in stage 3 of the floating point multiplier. The simulator calculates the power model equation results every cycle and sums them up for equations/sub-blocks to generate full-chip MIN, TYP, and MAX power values (26). After the run, power data is analyzed/summarized (28) by various methods including taking the average over several cycles and the peak variation in power from one cycle to the next. Average power consumption may be used to estimate the sustained temperature that the cooling system must be designed to tolerate. Peak power variation from one cycle to the next can be used to design decoupling capacitors and other circuitry to tolerate changes in inductance.
FIG. 2 shows an example of simulation results generated from a prior art full-chip power modeling simulation. The upper curve represents the worst case maximum value (MAX) at each cycle during a run. The middle curve represents typical power (TYP) for each cycle during the run. The lower curve represents the best case minimum power value (MIN) at each cycle in the run. Power behavior may be categorized in terms of characteristic factors. A factor “Peak” is defined as the highest power point reached over a run. A factor “Low” is defined as the lowest power point reached over a run. A factor “Average” (Avg) is defined as an average over a run. For example, Peak-Min (40) means the highest power point on the Min curve (34). Low-Typ (38) means the lowest power value on the Typ curve (32). Then, Peak-Max (36) means the highest power point on the Max curve (30). The simulation results may be analyzed using various methods. For example, they may be analyzed in terms of Peak, Avg, Low power values, or any other user-defined characteristic factors.
As the complexity of microprocessors increases, design engineers must deal with massive amounts of information from the results of power modeling simulations. Thus, it is important for the engineers to be able to obtain summary information to get a better understanding of the power behavior of a microprocessor. For example, summary information may provide information to help the engineers design system cooling and charge pumps, and to avoid resonance frequencies.